original_kernel/arch/arc/include/asm
Vineet Gupta 95d6976d20 ARC: Cache Flush Management
* ARC700 has VIPT L1 Caches
* Caches don't snoop and are not coherent
* Given the PAGE_SIZE and Cache associativity, we don't support aliasing
  D$ configurations (yet), but do allow aliasing I$ configs

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-02-15 23:15:50 +05:30
..
Kbuild
arcregs.h
asm-offsets.h
atomic.h
barrier.h
bitops.h
bug.h
byteorder.h
cache.h
cachectl.h
cacheflush.h
checksum.h
clk.h
cmpxchg.h
delay.h
elf.h
entry.h
exec.h
irq.h
irqflags.h
kdebug.h
linkage.h
module.h
mutex.h
page.h ARC: Fundamental ARCH data-types/defines 2013-02-11 20:00:34 +05:30
processor.h
ptrace.h
sections.h
segment.h
sigcontext.h
signal.h
smp.h
spinlock.h
spinlock_types.h
string.h
swab.h
switch_to.h
syscall.h
syscalls.h
thread_info.h
timex.h
uaccess.h
unistd.h