f65aad4177
Drivers for EDAC on Cavium. Supported subsystems are: o CPU primary caches. These are parity protected only, so only error reporting. o Second level cache - ECC protected, provides SECDED. o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will will only initialize if ECC is enabled on a system so is safe to run on non-ECC memory. o PCI: Parity error reporting Since it is very hard to test this sort of code the implementation is very conservative and uses polling where possible for now. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reviewed-by: Borislav Petkov <borislav.petkov@amd.com> |
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| .. | ||
| executive | ||
| .gitignore | ||
| Kconfig | ||
| Makefile | ||
| Platform | ||
| cpu.c | ||
| csrc-octeon.c | ||
| dma-octeon.c | ||
| flash_setup.c | ||
| octeon-irq.c | ||
| octeon-memcpy.S | ||
| octeon-platform.c | ||
| octeon_3xxx.dts | ||
| octeon_68xx.dts | ||
| octeon_boot.h | ||
| serial.c | ||
| setup.c | ||
| smp.c | ||