143 lines
4.1 KiB
Plaintext
143 lines
4.1 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# Performance Monitor Drivers
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#
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menu "Performance monitor support"
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depends on PERF_EVENTS
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config ARM_CCI_PMU
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tristate "ARM CCI PMU driver"
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depends on (ARM && CPU_V7) || ARM64
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select ARM_CCI
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help
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Support for PMU events monitoring on the ARM CCI (Cache Coherent
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Interconnect) family of products.
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If compiled as a module, it will be called arm-cci.
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config ARM_CCI400_PMU
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bool "support CCI-400"
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default y
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depends on ARM_CCI_PMU
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select ARM_CCI400_COMMON
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help
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CCI-400 provides 4 independent event counters counting events related
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to the connected slave/master interfaces, plus a cycle counter.
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config ARM_CCI5xx_PMU
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bool "support CCI-500/CCI-550"
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default y
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depends on ARM_CCI_PMU
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help
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CCI-500/CCI-550 both provide 8 independent event counters, which can
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count events pertaining to the slave/master interfaces as well as the
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internal events to the CCI.
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config ARM_CCN
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tristate "ARM CCN driver support"
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depends on ARM || ARM64
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help
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PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
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interconnect.
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config ARM_CMN
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tristate "Arm CMN-600 PMU support"
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depends on ARM64 || (COMPILE_TEST && 64BIT)
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help
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Support for PMU events monitoring on the Arm CMN-600 Coherent Mesh
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Network interconnect.
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config ARM_PMU
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depends on ARM || ARM64
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bool "ARM PMU framework"
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default y
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help
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Say y if you want to use CPU performance monitors on ARM-based
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systems.
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config ARM_PMU_ACPI
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depends on ARM_PMU && ACPI
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def_bool y
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config ARM_SMMU_V3_PMU
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tristate "ARM SMMUv3 Performance Monitors Extension"
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depends on ARM64 && ACPI
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help
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Provides support for the ARM SMMUv3 Performance Monitor Counter
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Groups (PMCG), which provide monitoring of transactions passing
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through the SMMU and allow the resulting information to be filtered
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based on the Stream ID of the corresponding master.
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config ARM_DSU_PMU
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tristate "ARM DynamIQ Shared Unit (DSU) PMU"
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depends on ARM64
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help
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Provides support for performance monitor unit in ARM DynamIQ Shared
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Unit (DSU). The DSU integrates one or more cores with an L3 memory
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system, control logic. The PMU allows counting various events related
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to DSU.
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config FSL_IMX8_DDR_PMU
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tristate "Freescale i.MX8 DDR perf monitor"
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depends on ARCH_MXC
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help
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Provides support for the DDR performance monitor in i.MX8, which
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can give information about memory throughput and other related
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events.
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config QCOM_L2_PMU
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bool "Qualcomm Technologies L2-cache PMU"
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depends on ARCH_QCOM && ARM64 && ACPI
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select QCOM_KRYO_L2_ACCESSORS
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help
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Provides support for the L2 cache performance monitor unit (PMU)
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in Qualcomm Technologies processors.
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Adds the L2 cache PMU into the perf events subsystem for
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monitoring L2 cache events.
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config QCOM_L3_PMU
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bool "Qualcomm Technologies L3-cache PMU"
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depends on ARCH_QCOM && ARM64 && ACPI
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select QCOM_IRQ_COMBINER
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help
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Provides support for the L3 cache performance monitor unit (PMU)
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in Qualcomm Technologies processors.
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Adds the L3 cache PMU into the perf events subsystem for
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monitoring L3 cache events.
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config THUNDERX2_PMU
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tristate "Cavium ThunderX2 SoC PMU UNCORE"
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depends on ARCH_THUNDER2 && ARM64 && ACPI && NUMA
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default m
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help
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Provides support for ThunderX2 UNCORE events.
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The SoC has PMU support in its L3 cache controller (L3C) and
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in the DDR4 Memory Controller (DMC).
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config XGENE_PMU
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depends on ARCH_XGENE
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bool "APM X-Gene SoC PMU"
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default n
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help
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Say y if you want to use APM X-Gene SoC performance monitors.
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config ARM_SPE_PMU
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tristate "Enable support for the ARMv8.2 Statistical Profiling Extension"
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depends on ARM64
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help
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Enable perf support for the ARMv8.2 Statistical Profiling
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Extension, which provides periodic sampling of operations in
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the CPU pipeline and reports this via the perf AUX interface.
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config ARM_DMC620_PMU
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tristate "Enable PMU support for the ARM DMC-620 memory controller"
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depends on (ARM64 && ACPI) || COMPILE_TEST
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help
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Support for PMU events monitoring on the ARM DMC-620 memory
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controller.
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source "drivers/perf/hisilicon/Kconfig"
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endmenu
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