b2a8e097d0
With the newer Samsung S3C2412 and S3C2413 SoC devices, the 48MHz USB clock has been given an individual gate into the USB OHCI and gadget blocks. This clock is called usb-bus-clock, and we need to replace the old use of the USB PLL (upll) directly with the new usb-bus-host. The S3C2410 clock driver has been updated already to provide a virtual clock which is a child of the UPLL to maintain compatibility. The S3C2412 clock driver correctly enables the PLL when either usb-bus clock is active. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
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