e2fc61f384
With up-to-date FPGA builds ARC cores are supposed to correctly operate even with 90 MHz clock (which is a target frequency for AXS103 release). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: arc-linux-dev@synopsys.com |
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| .. | ||
| Makefile | ||
| abilis_tb10x.dtsi | ||
| abilis_tb100.dtsi | ||
| abilis_tb100_dvk.dts | ||
| abilis_tb101.dtsi | ||
| abilis_tb101_dvk.dts | ||
| axc001.dtsi | ||
| axc003.dtsi | ||
| axc003_idu.dtsi | ||
| axs10x_mb.dtsi | ||
| axs101.dts | ||
| axs103.dts | ||
| axs103_idu.dts | ||
| nsim_700.dts | ||
| nsim_hs.dts | ||
| nsim_hs_idu.dts | ||
| nsimosci.dts | ||
| nsimosci_hs.dts | ||
| nsimosci_hs_idu.dts | ||
| skeleton.dtsi | ||
| vdk_axc003.dtsi | ||
| vdk_axc003_idu.dtsi | ||
| vdk_axs10x_mb.dtsi | ||
| vdk_hs38.dts | ||
| vdk_hs38_smp.dts | ||