147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* alternative runtime patching
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* inspired by the x86 version
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*
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* Copyright (C) 2014 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define pr_fmt(fmt) "alternatives: " fmt
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <asm/cacheflush.h>
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#include <asm/alternative.h>
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#include <asm/cpufeature.h>
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#include <asm/insn.h>
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#include <linux/stop_machine.h>
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#define __ALT_PTR(a,f) (u32 *)((void *)&(a)->f + (a)->f)
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#define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset)
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#define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset)
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extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
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struct alt_region {
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struct alt_instr *begin;
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struct alt_instr *end;
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};
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/*
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* Check if the target PC is within an alternative block.
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*/
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static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
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{
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unsigned long replptr;
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if (kernel_text_address(pc))
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return 1;
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replptr = (unsigned long)ALT_REPL_PTR(alt);
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if (pc >= replptr && pc <= (replptr + alt->alt_len))
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return 0;
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/*
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* Branching into *another* alternate sequence is doomed, and
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* we're not even trying to fix it up.
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*/
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BUG();
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}
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static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr)
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{
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u32 insn;
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insn = le32_to_cpu(*altinsnptr);
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if (aarch64_insn_is_branch_imm(insn)) {
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s32 offset = aarch64_get_branch_offset(insn);
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unsigned long target;
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target = (unsigned long)altinsnptr + offset;
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/*
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* If we're branching inside the alternate sequence,
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* do not rewrite the instruction, as it is already
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* correct. Otherwise, generate the new instruction.
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*/
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if (branch_insn_requires_update(alt, target)) {
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offset = target - (unsigned long)insnptr;
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insn = aarch64_set_branch_offset(insn, offset);
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}
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}
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return insn;
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}
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static int __apply_alternatives(void *alt_region)
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{
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struct alt_instr *alt;
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struct alt_region *region = alt_region;
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u32 *origptr, *replptr;
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for (alt = region->begin; alt < region->end; alt++) {
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u32 insn;
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int i, nr_inst;
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if (!cpus_have_cap(alt->cpufeature))
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continue;
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BUG_ON(alt->alt_len != alt->orig_len);
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pr_info_once("patching kernel code\n");
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origptr = ALT_ORIG_PTR(alt);
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replptr = ALT_REPL_PTR(alt);
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nr_inst = alt->alt_len / sizeof(insn);
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for (i = 0; i < nr_inst; i++) {
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insn = get_alt_insn(alt, origptr + i, replptr + i);
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*(origptr + i) = cpu_to_le32(insn);
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}
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flush_icache_range((uintptr_t)origptr,
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(uintptr_t)(origptr + nr_inst));
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}
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return 0;
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}
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void apply_alternatives_all(void)
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{
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struct alt_region region = {
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.begin = __alt_instructions,
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.end = __alt_instructions_end,
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};
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/* better not try code patching on a live SMP system */
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stop_machine(__apply_alternatives, ®ion, NULL);
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}
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void apply_alternatives(void *start, size_t length)
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{
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struct alt_region region = {
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.begin = start,
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.end = start + length,
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};
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__apply_alternatives(®ion);
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}
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void free_alternatives_memory(void)
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{
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free_reserved_area(__alt_instructions, __alt_instructions_end,
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0, "alternatives");
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}
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