86 lines
1.9 KiB
C
86 lines
1.9 KiB
C
/*
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* arch/xtensa/include/asm/traps.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 Tensilica Inc.
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*/
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#ifndef _XTENSA_TRAPS_H
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#define _XTENSA_TRAPS_H
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#include <asm/ptrace.h>
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/*
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* handler must be either of the following:
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* void (*)(struct pt_regs *regs);
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* void (*)(struct pt_regs *regs, unsigned long exccause);
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*/
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extern void * __init trap_set_handler(int cause, void *handler);
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extern void do_unhandled(struct pt_regs *regs, unsigned long exccause);
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void secondary_trap_init(void);
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static inline void spill_registers(void)
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{
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#if XCHAL_NUM_AREGS > 16
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__asm__ __volatile__ (
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" call8 1f\n"
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" _j 2f\n"
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" retw\n"
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" .align 4\n"
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"1:\n"
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#if XCHAL_NUM_AREGS == 32
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" _entry a1, 32\n"
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" addi a8, a0, 3\n"
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" _entry a1, 16\n"
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" mov a12, a12\n"
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" retw\n"
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#else
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" _entry a1, 48\n"
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" call12 1f\n"
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" retw\n"
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" .align 4\n"
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"1:\n"
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" .rept (" __stringify(XCHAL_NUM_AREGS) " - 16) / 12\n"
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" _entry a1, 48\n"
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" mov a12, a0\n"
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" .endr\n"
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" _entry a1, 16\n"
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#if XCHAL_NUM_AREGS % 12 == 0
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" mov a12, a12\n"
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#elif XCHAL_NUM_AREGS % 12 == 4
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" mov a4, a4\n"
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#elif XCHAL_NUM_AREGS % 12 == 8
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" mov a8, a8\n"
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#endif
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" retw\n"
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#endif
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"2:\n"
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: : : "a8", "a9", "memory");
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#else
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__asm__ __volatile__ (
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" mov a12, a12\n"
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: : : "memory");
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#endif
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}
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struct debug_table {
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/* Pointer to debug exception handler */
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void (*debug_exception)(void);
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/* Temporary register save area */
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unsigned long debug_save[1];
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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/* Save area for DBREAKC registers */
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unsigned long dbreakc_save[XCHAL_NUM_DBREAK];
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/* Saved ICOUNT register */
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unsigned long icount_save;
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/* Saved ICOUNTLEVEL register */
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unsigned long icount_level_save;
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#endif
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};
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void debug_exception(void);
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#endif /* _XTENSA_TRAPS_H */
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