107 lines
3.2 KiB
C
107 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Header file for FPGA Accelerated Function Unit (AFU) Driver
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*
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* Copyright (C) 2017-2018 Intel Corporation, Inc.
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*
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* Authors:
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* Wu Hao <hao.wu@intel.com>
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* Xiao Guangrong <guangrong.xiao@linux.intel.com>
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* Joseph Grecco <joe.grecco@intel.com>
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* Enno Luebbers <enno.luebbers@intel.com>
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* Tim Whisonant <tim.whisonant@intel.com>
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* Ananda Ravuri <ananda.ravuri@intel.com>
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* Henry Mitchel <henry.mitchel@intel.com>
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*/
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#ifndef __DFL_AFU_H
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#define __DFL_AFU_H
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#include <linux/mm.h>
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#include "dfl.h"
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/**
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* struct dfl_afu_mmio_region - afu mmio region data structure
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*
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* @index: region index.
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* @flags: region flags (access permission).
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* @size: region size.
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* @offset: region offset from start of the device fd.
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* @phys: region's physical address.
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* @node: node to add to afu feature dev's region list.
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*/
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struct dfl_afu_mmio_region {
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u32 index;
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u32 flags;
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u64 size;
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u64 offset;
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u64 phys;
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struct list_head node;
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};
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/**
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* struct dfl_afu_dma_region - afu DMA region data structure
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*
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* @user_addr: region userspace virtual address.
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* @length: region length.
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* @iova: region IO virtual address.
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* @pages: ptr to pages of this region.
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* @node: rb tree node.
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* @in_use: flag to indicate if this region is in_use.
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*/
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struct dfl_afu_dma_region {
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u64 user_addr;
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u64 length;
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u64 iova;
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struct page **pages;
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struct rb_node node;
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bool in_use;
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};
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/**
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* struct dfl_afu - afu device data structure
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*
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* @region_cur_offset: current region offset from start to the device fd.
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* @num_regions: num of mmio regions.
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* @regions: the mmio region linked list of this afu feature device.
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* @dma_regions: root of dma regions rb tree.
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* @num_umsgs: num of umsgs.
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*/
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struct dfl_afu {
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u64 region_cur_offset;
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int num_regions;
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u8 num_umsgs;
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struct list_head regions;
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struct rb_root dma_regions;
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};
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/* hold pdata->lock when call __afu_port_enable/disable */
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int __afu_port_enable(struct platform_device *pdev);
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int __afu_port_disable(struct platform_device *pdev);
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void afu_mmio_region_init(struct dfl_feature_platform_data *pdata);
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int afu_mmio_region_add(struct dfl_feature_platform_data *pdata,
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u32 region_index, u64 region_size, u64 phys, u32 flags);
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void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata);
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int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata,
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u32 region_index,
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struct dfl_afu_mmio_region *pregion);
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int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata,
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u64 offset, u64 size,
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struct dfl_afu_mmio_region *pregion);
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void afu_dma_region_init(struct dfl_feature_platform_data *pdata);
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void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata);
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int afu_dma_map_region(struct dfl_feature_platform_data *pdata,
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u64 user_addr, u64 length, u64 *iova);
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int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova);
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struct dfl_afu_dma_region *
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afu_dma_region_find(struct dfl_feature_platform_data *pdata,
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u64 iova, u64 size);
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extern const struct dfl_feature_ops port_err_ops;
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extern const struct dfl_feature_id port_err_id_table[];
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extern const struct attribute_group port_err_group;
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#endif /* __DFL_AFU_H */
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