407 lines
11 KiB
C
407 lines
11 KiB
C
/*
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* bf5xx-ac97.c -- AC97 support for the ADI blackfin chip.
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*
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* Author: Roy Huang
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* Created: 11th. June 2007
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* Copyright: Analog Device Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/wait.h>
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#include <linux/delay.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/ac97_codec.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <asm/irq.h>
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#include <asm/portmux.h>
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#include <linux/mutex.h>
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#include <linux/gpio.h>
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#include "bf5xx-sport.h"
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#include "bf5xx-ac97.h"
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#if defined(CONFIG_BF54x)
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#define PIN_REQ_SPORT_0 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, \
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P_SPORT0_RFS, P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
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#define PIN_REQ_SPORT_1 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, \
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P_SPORT1_RFS, P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
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#define PIN_REQ_SPORT_2 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, \
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P_SPORT2_RFS, P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0}
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#define PIN_REQ_SPORT_3 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, \
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P_SPORT3_RFS, P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0}
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#else
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#define PIN_REQ_SPORT_0 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
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P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
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#define PIN_REQ_SPORT_1 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
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P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
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#endif
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static int *cmd_count;
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static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
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#if defined(CONFIG_BF54x)
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static struct sport_param sport_params[4] = {
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{
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.dma_rx_chan = CH_SPORT0_RX,
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.dma_tx_chan = CH_SPORT0_TX,
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.err_irq = IRQ_SPORT0_ERR,
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.regs = (struct sport_register *)SPORT0_TCR1,
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},
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{
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.dma_rx_chan = CH_SPORT1_RX,
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.dma_tx_chan = CH_SPORT1_TX,
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.err_irq = IRQ_SPORT1_ERR,
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.regs = (struct sport_register *)SPORT1_TCR1,
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},
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{
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.dma_rx_chan = CH_SPORT2_RX,
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.dma_tx_chan = CH_SPORT2_TX,
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.err_irq = IRQ_SPORT2_ERR,
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.regs = (struct sport_register *)SPORT2_TCR1,
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},
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{
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.dma_rx_chan = CH_SPORT3_RX,
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.dma_tx_chan = CH_SPORT3_TX,
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.err_irq = IRQ_SPORT3_ERR,
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.regs = (struct sport_register *)SPORT3_TCR1,
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}
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};
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#else
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static struct sport_param sport_params[2] = {
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{
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.dma_rx_chan = CH_SPORT0_RX,
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.dma_tx_chan = CH_SPORT0_TX,
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.err_irq = IRQ_SPORT0_ERROR,
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.regs = (struct sport_register *)SPORT0_TCR1,
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},
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{
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.dma_rx_chan = CH_SPORT1_RX,
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.dma_tx_chan = CH_SPORT1_TX,
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.err_irq = IRQ_SPORT1_ERROR,
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.regs = (struct sport_register *)SPORT1_TCR1,
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}
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};
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#endif
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void bf5xx_pcm_to_ac97(struct ac97_frame *dst, const __u32 *src, \
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size_t count)
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{
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while (count--) {
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dst->ac97_tag = TAG_VALID | TAG_PCM;
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(dst++)->ac97_pcm = *src++;
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}
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}
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EXPORT_SYMBOL(bf5xx_pcm_to_ac97);
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void bf5xx_ac97_to_pcm(const struct ac97_frame *src, __u32 *dst, \
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size_t count)
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{
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while (count--)
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*(dst++) = (src++)->ac97_pcm;
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}
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EXPORT_SYMBOL(bf5xx_ac97_to_pcm);
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static unsigned int sport_tx_curr_frag(struct sport_device *sport)
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{
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return sport->tx_curr_frag = sport_curr_offset_tx(sport) / \
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sport->tx_fragsize;
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}
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static void enqueue_cmd(struct snd_ac97 *ac97, __u16 addr, __u16 data)
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{
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struct sport_device *sport = sport_handle;
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int nextfrag = sport_tx_curr_frag(sport);
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struct ac97_frame *nextwrite;
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sport_incfrag(sport, &nextfrag, 1);
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nextwrite = (struct ac97_frame *)(sport->tx_buf + \
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nextfrag * sport->tx_fragsize);
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pr_debug("sport->tx_buf:%p, nextfrag:0x%x nextwrite:%p, cmd_count:%d\n",
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sport->tx_buf, nextfrag, nextwrite, cmd_count[nextfrag]);
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nextwrite[cmd_count[nextfrag]].ac97_tag |= TAG_CMD;
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nextwrite[cmd_count[nextfrag]].ac97_addr = addr;
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nextwrite[cmd_count[nextfrag]].ac97_data = data;
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++cmd_count[nextfrag];
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pr_debug("ac97_sport: Inserting %02x/%04x into fragment %d\n",
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addr >> 8, data, nextfrag);
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}
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static unsigned short bf5xx_ac97_read(struct snd_ac97 *ac97,
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unsigned short reg)
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{
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struct ac97_frame out_frame[2], in_frame[2];
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pr_debug("%s enter 0x%x\n", __func__, reg);
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/* When dma descriptor is enabled, the register should not be read */
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if (sport_handle->tx_run || sport_handle->rx_run) {
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pr_err("Could you send a mail to cliff.cai@analog.com "
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"to report this?\n");
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return -EFAULT;
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}
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memset(&out_frame, 0, 2 * sizeof(struct ac97_frame));
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memset(&in_frame, 0, 2 * sizeof(struct ac97_frame));
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out_frame[0].ac97_tag = TAG_VALID | TAG_CMD;
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out_frame[0].ac97_addr = ((reg << 8) | 0x8000);
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sport_send_and_recv(sport_handle, (unsigned char *)&out_frame,
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(unsigned char *)&in_frame,
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2 * sizeof(struct ac97_frame));
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return in_frame[1].ac97_data;
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}
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void bf5xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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unsigned short val)
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{
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pr_debug("%s enter 0x%x:0x%04x\n", __func__, reg, val);
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if (sport_handle->tx_run) {
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enqueue_cmd(ac97, (reg << 8), val); /* write */
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enqueue_cmd(ac97, (reg << 8) | 0x8000, 0); /* read back */
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} else {
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struct ac97_frame frame;
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memset(&frame, 0, sizeof(struct ac97_frame));
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frame.ac97_tag = TAG_VALID | TAG_CMD;
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frame.ac97_addr = (reg << 8);
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frame.ac97_data = val;
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sport_send_and_recv(sport_handle, (unsigned char *)&frame, \
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NULL, sizeof(struct ac97_frame));
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}
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}
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static void bf5xx_ac97_warm_reset(struct snd_ac97 *ac97)
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{
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF561) || \
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(defined(BF537_FAMILY) && (CONFIG_SND_BF5XX_SPORT_NUM == 1))
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#define CONCAT(a, b, c) a ## b ## c
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#define BFIN_SPORT_RFS(x) CONCAT(P_SPORT, x, _RFS)
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u16 per = BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM);
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u16 gpio = P_IDENT(BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM));
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pr_debug("%s enter\n", __func__);
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peripheral_free(per);
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gpio_request(gpio, "bf5xx-ac97");
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gpio_direction_output(gpio, 1);
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udelay(2);
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gpio_set_value(gpio, 0);
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udelay(1);
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gpio_free(gpio);
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peripheral_request(per, "soc-audio");
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#else
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pr_info("%s: Not implemented\n", __func__);
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#endif
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}
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static void bf5xx_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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pr_debug("%s enter\n", __func__);
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/* It is specified for bf548-ezkit */
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gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 0);
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/* Keep reset pin low for 1 ms */
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mdelay(1);
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gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
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/* Wait for bit clock recover */
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mdelay(1);
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#else
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pr_info("%s: Not implemented\n", __func__);
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#endif
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}
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struct snd_ac97_bus_ops soc_ac97_ops = {
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.read = bf5xx_ac97_read,
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.write = bf5xx_ac97_write,
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.warm_reset = bf5xx_ac97_warm_reset,
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.reset = bf5xx_ac97_cold_reset,
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};
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EXPORT_SYMBOL_GPL(soc_ac97_ops);
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#ifdef CONFIG_PM
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static int bf5xx_ac97_suspend(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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struct sport_device *sport =
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(struct sport_device *)dai->private_data;
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pr_debug("%s : sport %d\n", __func__, dai->id);
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if (!dai->active)
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return 0;
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if (dai->capture.active)
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sport_rx_stop(sport);
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if (dai->playback.active)
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sport_tx_stop(sport);
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return 0;
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}
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static int bf5xx_ac97_resume(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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int ret;
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struct sport_device *sport =
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(struct sport_device *)dai->private_data;
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pr_debug("%s : sport %d\n", __func__, dai->id);
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if (!dai->active)
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return 0;
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ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
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if (ret) {
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pr_err("SPORT is busy!\n");
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return -EBUSY;
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}
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ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
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if (ret) {
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pr_err("SPORT is busy!\n");
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return -EBUSY;
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}
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ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
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if (ret) {
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pr_err("SPORT is busy!\n");
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return -EBUSY;
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}
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if (dai->capture.active)
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sport_rx_start(sport);
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if (dai->playback.active)
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sport_tx_start(sport);
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return 0;
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}
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#else
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#define bf5xx_ac97_suspend NULL
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#define bf5xx_ac97_resume NULL
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#endif
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static int bf5xx_ac97_probe(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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int ret;
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#if defined(CONFIG_BF54x)
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u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1,
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PIN_REQ_SPORT_2, PIN_REQ_SPORT_3};
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#else
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u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1};
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#endif
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cmd_count = (int *)get_zeroed_page(GFP_KERNEL);
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if (cmd_count == NULL)
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return -ENOMEM;
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if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
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pr_err("Requesting Peripherals failed\n");
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return -EFAULT;
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}
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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/* Request PB3 as reset pin */
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if (gpio_request(CONFIG_SND_BF5XX_RESET_GPIO_NUM, "SND_AD198x RESET")) {
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pr_err("Failed to request GPIO_%d for reset\n",
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CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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peripheral_free_list(&sport_req[sport_num][0]);
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return -1;
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}
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gpio_direction_output(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
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#endif
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sport_handle = sport_init(&sport_params[sport_num], 2, \
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sizeof(struct ac97_frame), NULL);
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if (!sport_handle) {
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peripheral_free_list(&sport_req[sport_num][0]);
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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#endif
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return -ENODEV;
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}
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/*SPORT works in TDM mode to simulate AC97 transfers*/
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ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
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if (ret) {
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pr_err("SPORT is busy!\n");
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kfree(sport_handle);
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peripheral_free_list(&sport_req[sport_num][0]);
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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#endif
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return -EBUSY;
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}
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ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
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if (ret) {
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pr_err("SPORT is busy!\n");
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kfree(sport_handle);
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peripheral_free_list(&sport_req[sport_num][0]);
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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#endif
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return -EBUSY;
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}
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ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
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if (ret) {
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pr_err("SPORT is busy!\n");
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kfree(sport_handle);
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peripheral_free_list(&sport_req[sport_num][0]);
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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#endif
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return -EBUSY;
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}
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return 0;
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}
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static void bf5xx_ac97_remove(struct platform_device *pdev,
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struct snd_soc_dai *dai)
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{
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free_page((unsigned long)cmd_count);
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cmd_count = NULL;
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#ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
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gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
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#endif
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}
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struct snd_soc_dai bfin_ac97_dai = {
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.name = "bf5xx-ac97",
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.id = 0,
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.type = SND_SOC_DAI_AC97,
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.probe = bf5xx_ac97_probe,
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.remove = bf5xx_ac97_remove,
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.suspend = bf5xx_ac97_suspend,
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.resume = bf5xx_ac97_resume,
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.playback = {
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.stream_name = "AC97 Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE, },
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.capture = {
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.stream_name = "AC97 Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE, },
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};
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EXPORT_SYMBOL_GPL(bfin_ac97_dai);
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MODULE_AUTHOR("Roy Huang");
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MODULE_DESCRIPTION("AC97 driver for ADI Blackfin");
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MODULE_LICENSE("GPL");
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