original_kernel/arch
Ralf Baechle d04533650f [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.
The BCM148 has 4 cores but there are also just 4 generic timers available
so use the ZBbus cycle counter instead of it.  In addition the ZBbus
counter also offers a much higher resolution and 64-bit counting so I'm
considering a later complete conversion to it once I figure out if all
members of the Sibyte SOC family support it - the docs seem to agree but
the headers files seem to disagree ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22 22:09:00 +01:00
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alpha
arm
avr32
blackfin
cris
frv
h8300
i386
ia64
m32r
m68k
m68knommu
mips [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. 2007-10-22 22:09:00 +01:00
parisc
powerpc
ppc
s390
sh
sh64
sparc
sparc64
um
v850
x86
x86_64
xtensa