253 lines
6.4 KiB
C
253 lines
6.4 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 Waldorf GMBH
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* Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
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* Copyright (C) 1996 Paul M. Antoine
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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*/
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#ifndef _ASM_PROCESSOR_H
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#define _ASM_PROCESSOR_H
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#include <linux/cpumask.h>
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#include <linux/threads.h>
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#include <asm/cachectl.h>
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#include <asm/cpu.h>
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#include <asm/cpu-info.h>
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#include <asm/mipsregs.h>
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#include <asm/prefetch.h>
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#include <asm/system.h>
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/*
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* Return current * instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ __label__ _l; _l: &&_l;})
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/*
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* System setup and hardware flags..
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*/
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extern void (*cpu_wait)(void);
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extern unsigned int vced_count, vcei_count;
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#ifdef CONFIG_32BIT
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/*
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* User space process size: 2GB. This is hardcoded into a few places,
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* so don't change it unless you know what you are doing.
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*/
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#define TASK_SIZE 0x7fff8000UL
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/*
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* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
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#endif
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#ifdef CONFIG_64BIT
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/*
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* User space process size: 1TB. This is hardcoded into a few places,
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* so don't change it unless you know what you are doing. TASK_SIZE
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* is limited to 1TB by the R4000 architecture; R10000 and better can
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* support 16TB; the architectural reserve for future expansion is
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* 8192EB ...
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*/
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#define TASK_SIZE32 0x7fff8000UL
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#define TASK_SIZE 0x10000000000UL
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/*
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* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE ((current->thread.mflags & MF_32BIT_ADDR) ? \
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PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3))
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#endif
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#define NUM_FPU_REGS 32
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typedef __u64 fpureg_t;
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/*
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* It would be nice to add some more fields for emulator statistics, but there
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* are a number of fixed offsets in offset.h and elsewhere that would have to
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* be recalculated by hand. So the additional information will be private to
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* the FPU emulator for now. See asm-mips/fpu_emulator.h.
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*/
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struct mips_fpu_struct {
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fpureg_t fpr[NUM_FPU_REGS];
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unsigned int fcr31;
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};
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#define INIT_FPU { \
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{0,} \
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}
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#define NUM_DSP_REGS 6
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typedef __u32 dspreg_t;
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struct mips_dsp_state {
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dspreg_t dspr[NUM_DSP_REGS];
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unsigned int dspcontrol;
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};
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#define INIT_DSP {{0,},}
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#define INIT_CPUMASK { \
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{0,} \
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}
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typedef struct {
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unsigned long seg;
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} mm_segment_t;
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#define ARCH_MIN_TASKALIGN 8
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struct mips_abi;
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/*
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* If you change thread_struct remember to change the #defines below too!
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*/
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struct thread_struct {
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/* Saved main processor registers. */
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unsigned long reg16;
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unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23;
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unsigned long reg29, reg30, reg31;
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/* Saved cp0 stuff. */
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unsigned long cp0_status;
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/* Saved fpu/fpu emulator stuff. */
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struct mips_fpu_struct fpu;
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#ifdef CONFIG_MIPS_MT_FPAFF
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/* Emulated instruction count */
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unsigned long emulated_fp;
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/* Saved per-thread scheduler affinity mask */
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cpumask_t user_cpus_allowed;
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#endif /* CONFIG_MIPS_MT_FPAFF */
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/* Saved state of the DSP ASE, if available. */
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struct mips_dsp_state dsp;
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/* Other stuff associated with the thread. */
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unsigned long cp0_badvaddr; /* Last user fault */
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unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
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unsigned long error_code;
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unsigned long trap_no;
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#define MF_FIXADE 1 /* Fix address errors in software */
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#define MF_LOGADE 2 /* Log address errors to syslog */
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#define MF_32BIT_REGS 4 /* also implies 16/32 fprs */
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#define MF_32BIT_ADDR 8 /* 32-bit address space (o32/n32) */
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#define MF_FPUBOUND 0x10 /* thread bound to FPU-full CPU set */
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unsigned long mflags;
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unsigned long irix_trampoline; /* Wheee... */
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unsigned long irix_oldctx;
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struct mips_abi *abi;
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};
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#define MF_ABI_MASK (MF_32BIT_REGS | MF_32BIT_ADDR)
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#define MF_O32 (MF_32BIT_REGS | MF_32BIT_ADDR)
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#define MF_N32 MF_32BIT_ADDR
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#define MF_N64 0
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#ifdef CONFIG_MIPS_MT_FPAFF
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#define FPAFF_INIT 0, INIT_CPUMASK,
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#else
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#define FPAFF_INIT
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#endif /* CONFIG_MIPS_MT_FPAFF */
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#define INIT_THREAD { \
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/* \
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* saved main processor registers \
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*/ \
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0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, \
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/* \
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* saved cp0 stuff \
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*/ \
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0, \
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/* \
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* saved fpu/fpu emulator stuff \
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*/ \
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INIT_FPU, \
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/* \
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* fpu affinity state (null if not FPAFF) \
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*/ \
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FPAFF_INIT \
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/* \
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* saved dsp/dsp emulator stuff \
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*/ \
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INIT_DSP, \
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/* \
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* Other stuff associated with the process \
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*/ \
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0, 0, 0, 0, \
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/* \
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* For now the default is to fix address errors \
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*/ \
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MF_FIXADE, 0, 0 \
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}
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struct task_struct;
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/* Free all resources held by a thread. */
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#define release_thread(thread) do { } while(0)
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/* Prepare to copy thread state - unlazy all lazy status */
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#define prepare_to_copy(tsk) do { } while (0)
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extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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extern unsigned long thread_saved_pc(struct task_struct *tsk);
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/*
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* Do necessary setup to start up a newly executed thread.
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*/
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extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
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unsigned long get_wchan(struct task_struct *p);
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#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32)
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#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1)
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29])
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#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status)
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#define cpu_relax() barrier()
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/*
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* Return_address is a replacement for __builtin_return_address(count)
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* which on certain architectures cannot reasonably be implemented in GCC
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* (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386).
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* Note that __builtin_return_address(x>=1) is forbidden because GCC
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* aborts compilation on some CPUs. It's simply not possible to unwind
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* some CPU's stackframes.
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*
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* __builtin_return_address works only for non-leaf functions. We avoid the
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* overhead of a function call by forcing the compiler to save the return
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* address register on the stack.
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*/
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#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
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#ifdef CONFIG_CPU_HAS_PREFETCH
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#define ARCH_HAS_PREFETCH
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extern inline void prefetch(const void *addr)
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{
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__asm__ __volatile__(
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" .set mips4 \n"
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" pref %0, (%1) \n"
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" .set mips0 \n"
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:
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: "i" (Pref_Load), "r" (addr));
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}
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#endif
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#endif /* _ASM_PROCESSOR_H */
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