45 lines
1.6 KiB
Makefile
45 lines
1.6 KiB
Makefile
# ===========================================================================
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# arch/um: Generic definitions
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# ===========================================================================
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USER_SINGLE_OBJS := \
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$(foreach f,$(patsubst %.o,%,$(obj-y) $(obj-m)),$($(f)-objs))
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USER_OBJS += $(filter %_user.o,$(obj-y) $(obj-m) $(USER_SINGLE_OBJS))
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USER_OBJS := $(foreach file,$(USER_OBJS),$(obj)/$(file))
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$(USER_OBJS) $(USER_OBJS:.o=.i) $(USER_OBJS:.o=.s) $(USER_OBJS:.o=.lst): \
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c_flags = -Wp,-MD,$(depfile) $(USER_CFLAGS) $(CFLAGS_$(notdir $@))
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$(USER_OBJS): cmd_checksrc =
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$(USER_OBJS): quiet_cmd_checksrc =
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$(USER_OBJS): cmd_force_checksrc =
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$(USER_OBJS): quiet_cmd_force_checksrc =
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# The stubs and unmap.o can't try to call mcount or update basic block data
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define unprofile
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$(patsubst -pg,,$(patsubst -fprofile-arcs -ftest-coverage,,$(1)))
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endef
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# The stubs and unmap.o can't try to call mcount or update basic block data
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define unprofile
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$(patsubst -pg,,$(patsubst -fprofile-arcs -ftest-coverage,,$(1)))
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endef
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quiet_cmd_make_link = SYMLINK $@
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cmd_make_link = ln -sf $(srctree)/arch/$(SUBARCH)/$($(notdir $@)-dir)/$(notdir $@) $@
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# this needs to be before the foreach, because targets does not accept
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# complete paths like $(obj)/$(f). To make sure this works, use a := assignment
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# or we will get $(obj)/$(f) in the "targets" value.
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# Also, this forces you to use the := syntax when assigning to targets.
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# Otherwise the line below will cause an infinite loop (if you don't know why,
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# just do it).
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targets := $(targets) $(SYMLINKS)
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SYMLINKS := $(foreach f,$(SYMLINKS),$(obj)/$(f))
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$(SYMLINKS): FORCE
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$(call if_changed,make_link)
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