114 lines
2.7 KiB
C
114 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Interconnect framework driver for i.MX SoC
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*
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* Copyright (c) 2019, BayLibre
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* Copyright (c) 2019-2020, NXP
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* Author: Alexandre Bailon <abailon@baylibre.com>
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* Author: Leonard Crestez <leonard.crestez@nxp.com>
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*/
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#ifndef __DRIVERS_INTERCONNECT_IMX_H
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#define __DRIVERS_INTERCONNECT_IMX_H
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#include <linux/args.h>
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#include <linux/bits.h>
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#include <linux/types.h>
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#include <linux/interconnect-provider.h>
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struct platform_device;
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#define IMX_ICC_MAX_LINKS 4
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/*
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* High throughput priority level in Regulator mode
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* Read Priority in Fixed/Limiter mode
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*/
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#define PRIORITY0_SHIFT 0
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/*
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* Low throughput priority level in Regulator mode
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* Write Priority in Fixed/Limiter mode
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*/
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#define PRIORITY1_SHIFT 8
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#define PRIORITY_MASK 0x7
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#define PRIORITY_COMP_MARK BIT(31) /* Must set */
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#define IMX_NOC_MODE_FIXED 0
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#define IMX_NOC_MODE_LIMITER 1
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#define IMX_NOC_MODE_BYPASS 2
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#define IMX_NOC_MODE_REGULATOR 3
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#define IMX_NOC_MODE_UNCONFIGURED 0xFF
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#define IMX_NOC_PRIO_REG 0x8
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#define IMX_NOC_MODE_REG 0xC
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#define IMX_NOC_BANDWIDTH_REG 0x10
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#define IMX_NOC_SATURATION 0x14
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#define IMX_NOC_EXT_CTL_REG 0x18
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struct imx_icc_provider {
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void __iomem *noc_base;
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struct icc_provider provider;
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};
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/*
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* struct imx_icc_node_adj - Describe a dynamic adjustable node
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*/
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struct imx_icc_node_adj_desc {
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unsigned int bw_mul, bw_div;
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const char *phandle_name;
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bool main_noc;
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};
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/*
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* struct imx_icc_node - Describe an interconnect node
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* @name: name of the node
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* @id: an unique id to identify the node
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* @links: an array of slaves' node id
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* @num_links: number of id defined in links
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*/
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struct imx_icc_node_desc {
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const char *name;
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u16 id;
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u16 links[IMX_ICC_MAX_LINKS];
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u16 num_links;
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const struct imx_icc_node_adj_desc *adj;
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};
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/*
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* struct imx_icc_noc_setting - Describe an interconnect node setting
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* @reg: register offset inside the NoC
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* @prio_level: priority level
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* @mode: functional mode
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* @ext_control: external input control
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*/
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struct imx_icc_noc_setting {
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u32 reg;
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u32 prio_level;
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u32 mode;
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u32 ext_control;
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};
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#define DEFINE_BUS_INTERCONNECT(_name, _id, _adj, ...) \
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{ \
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.id = _id, \
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.name = _name, \
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.adj = _adj, \
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.num_links = COUNT_ARGS(__VA_ARGS__), \
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.links = { __VA_ARGS__ }, \
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}
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#define DEFINE_BUS_MASTER(_name, _id, _dest_id) \
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DEFINE_BUS_INTERCONNECT(_name, _id, NULL, _dest_id)
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#define DEFINE_BUS_SLAVE(_name, _id, _adj) \
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DEFINE_BUS_INTERCONNECT(_name, _id, _adj)
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int imx_icc_register(struct platform_device *pdev,
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struct imx_icc_node_desc *nodes,
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int nodes_count,
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struct imx_icc_noc_setting *noc_settings);
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void imx_icc_unregister(struct platform_device *pdev);
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#endif /* __DRIVERS_INTERCONNECT_IMX_H */
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