20d330645c
On some MIPS systems, a subset of devices may have DMA coherent with CPU caches. For example in systems including a MIPS I/O Coherence Unit (IOCU), some devices may be connected to that IOCU whilst others are not. Prior to this patch, we have a plat_device_is_coherent() function but no implementation which does anything besides return a global true or false, optionally chosen at runtime. For devices such as those described above this is insufficient. Fix this by tracking DMA coherence on a per-device basis with a dma_coherent field in struct dev_archdata. Setting this from arch_setup_dma_ops() takes care of devices which set the dma-coherent property via device tree, and any PCI devices beneath a bridge described in DT, automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
Makefile | ||
c-octeon.c | ||
c-r3k.c | ||
c-r4k.c | ||
c-tx39.c | ||
cache.c | ||
cerr-sb1.c | ||
cex-gen.S | ||
cex-oct.S | ||
cex-sb1.S | ||
dma-default.c | ||
extable.c | ||
fault.c | ||
gup.c | ||
highmem.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap.c | ||
mmap.c | ||
page-funcs.S | ||
page.c | ||
pgtable-32.c | ||
pgtable-64.c | ||
sc-debugfs.c | ||
sc-ip22.c | ||
sc-mips.c | ||
sc-r5k.c | ||
sc-rm7k.c | ||
tlb-funcs.S | ||
tlb-r3k.c | ||
tlb-r4k.c | ||
tlb-r8k.c | ||
tlbex-fault.S | ||
tlbex.c | ||
uasm-micromips.c | ||
uasm-mips.c | ||
uasm.c |