Florian Fainelli e59b008e14 MIPS: BCM63XX: fix BCM6345 clocks bits ... BCM6345 has an intermediate 16-bits wide test control register between the peripheral identifier register, and its clock control register is only 16-bits wide contrary to other platforms where it is 32-bits wide. By shifting all clocks bits by 16-bits to the left we ensure they get written to the proper clock control register, without adding specific BCM6345 handling in the clock code. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4555/ Signed-off-by: John Crispin <blogic@openwrt.org>		2012-11-20 08:30:50 +01:00
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asm	MIPS: BCM63XX: fix BCM6345 clocks bits	2012-11-20 08:30:50 +01:00
uapi/asm	…