251 lines
6.4 KiB
C
251 lines
6.4 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
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*/
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/geo.h>
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#include <asm/sn/pcibr_provider.h>
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#include <asm/sn/pcibus_provider_defs.h>
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#include <asm/sn/pcidev.h>
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#include <asm/sn/sn_sal.h>
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#include <asm/sn/sn2/sn_hwperf.h>
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#include "xtalk/xwidgetdev.h"
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#include "xtalk/hubdev.h"
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int
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sal_pcibr_slot_enable(struct pcibus_info *soft, int device, void *resp)
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{
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struct ia64_sal_retval ret_stuff;
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uint64_t busnum;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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busnum = soft->pbi_buscommon.bs_persist_busnum;
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SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_ENABLE, (u64) busnum,
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(u64) device, (u64) resp, 0, 0, 0, 0);
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return (int)ret_stuff.v0;
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}
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int
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sal_pcibr_slot_disable(struct pcibus_info *soft, int device, int action,
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void *resp)
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{
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struct ia64_sal_retval ret_stuff;
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uint64_t busnum;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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busnum = soft->pbi_buscommon.bs_persist_busnum;
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SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_SLOT_DISABLE,
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(u64) busnum, (u64) device, (u64) action,
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(u64) resp, 0, 0, 0);
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return (int)ret_stuff.v0;
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}
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static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
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{
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struct ia64_sal_retval ret_stuff;
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uint64_t busnum;
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int segment;
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ret_stuff.status = 0;
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ret_stuff.v0 = 0;
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segment = soft->pbi_buscommon.bs_persist_segment;
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busnum = soft->pbi_buscommon.bs_persist_busnum;
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SAL_CALL_NOLOCK(ret_stuff,
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(u64) SN_SAL_IOIF_ERROR_INTERRUPT,
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(u64) segment, (u64) busnum, 0, 0, 0, 0, 0);
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return (int)ret_stuff.v0;
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}
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/*
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* PCI Bridge Error interrupt handler. Gets invoked whenever a PCI
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* bridge sends an error interrupt.
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*/
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static irqreturn_t
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pcibr_error_intr_handler(int irq, void *arg, struct pt_regs *regs)
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{
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struct pcibus_info *soft = (struct pcibus_info *)arg;
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if (sal_pcibr_error_interrupt(soft) < 0) {
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panic("pcibr_error_intr_handler(): Fatal Bridge Error");
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}
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return IRQ_HANDLED;
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}
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void *
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pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
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{
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int nasid, cnode, j;
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cnodeid_t near_cnode;
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struct hubdev_info *hubdev_info;
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struct pcibus_info *soft;
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struct sn_flush_device_list *sn_flush_device_list;
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if (! IS_PCI_BRIDGE_ASIC(prom_bussoft->bs_asic_type)) {
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return NULL;
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}
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/*
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* Allocate kernel bus soft and copy from prom.
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*/
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soft = kmalloc(sizeof(struct pcibus_info), GFP_KERNEL);
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if (!soft) {
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return NULL;
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}
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memcpy(soft, prom_bussoft, sizeof(struct pcibus_info));
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soft->pbi_buscommon.bs_base =
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(((u64) soft->pbi_buscommon.
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bs_base << 4) >> 4) | __IA64_UNCACHED_OFFSET;
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spin_lock_init(&soft->pbi_lock);
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/*
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* register the bridge's error interrupt handler
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*/
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if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
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SA_SHIRQ, "PCIBR error", (void *)(soft))) {
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printk(KERN_WARNING
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"pcibr cannot allocate interrupt for error handler\n");
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}
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/*
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* Update the Bridge with the "kernel" pagesize
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*/
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if (PAGE_SIZE < 16384) {
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pcireg_control_bit_clr(soft, PCIBR_CTRL_PAGE_SIZE);
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} else {
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pcireg_control_bit_set(soft, PCIBR_CTRL_PAGE_SIZE);
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}
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nasid = NASID_GET(soft->pbi_buscommon.bs_base);
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cnode = nasid_to_cnodeid(nasid);
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hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
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if (hubdev_info->hdi_flush_nasid_list.widget_p) {
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sn_flush_device_list = hubdev_info->hdi_flush_nasid_list.
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widget_p[(int)soft->pbi_buscommon.bs_xid];
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if (sn_flush_device_list) {
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for (j = 0; j < DEV_PER_WIDGET;
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j++, sn_flush_device_list++) {
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if (sn_flush_device_list->sfdl_slot == -1)
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continue;
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if ((sn_flush_device_list->
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sfdl_persistent_segment ==
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soft->pbi_buscommon.bs_persist_segment) &&
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(sn_flush_device_list->
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sfdl_persistent_busnum ==
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soft->pbi_buscommon.bs_persist_busnum))
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sn_flush_device_list->sfdl_pcibus_info =
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soft;
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}
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}
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}
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/* Setup the PMU ATE map */
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soft->pbi_int_ate_resource.lowest_free_index = 0;
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soft->pbi_int_ate_resource.ate =
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kmalloc(soft->pbi_int_ate_size * sizeof(uint64_t), GFP_KERNEL);
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memset(soft->pbi_int_ate_resource.ate, 0,
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(soft->pbi_int_ate_size * sizeof(uint64_t)));
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if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
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/* TIO PCI Bridge: find nearest node with CPUs */
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int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
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if (e < 0) {
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near_cnode = (cnodeid_t)-1; /* use any node */
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printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
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"near node with CPUs to TIO node %d, err=%d\n",
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cnode, e);
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}
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controller->node = near_cnode;
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}
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else
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controller->node = cnode;
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return soft;
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}
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void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
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{
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struct pcidev_info *pcidev_info;
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struct pcibus_info *pcibus_info;
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int bit = sn_irq_info->irq_int_bit;
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if (! sn_irq_info->irq_bridge)
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return;
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pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
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if (pcidev_info) {
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pcibus_info =
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(struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
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pdi_pcibus_info;
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pcireg_force_intr_set(pcibus_info, bit);
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}
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}
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void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
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{
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struct pcidev_info *pcidev_info;
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struct pcibus_info *pcibus_info;
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int bit = sn_irq_info->irq_int_bit;
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uint64_t xtalk_addr = sn_irq_info->irq_xtalkaddr;
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pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
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if (pcidev_info) {
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pcibus_info =
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(struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
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pdi_pcibus_info;
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/* Disable the device's IRQ */
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pcireg_intr_enable_bit_clr(pcibus_info, bit);
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/* Change the device's IRQ */
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pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
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/* Re-enable the device's IRQ */
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pcireg_intr_enable_bit_set(pcibus_info, bit);
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pcibr_force_interrupt(sn_irq_info);
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}
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}
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/*
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* Provider entries for PIC/CP
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*/
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struct sn_pcibus_provider pcibr_provider = {
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.dma_map = pcibr_dma_map,
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.dma_map_consistent = pcibr_dma_map_consistent,
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.dma_unmap = pcibr_dma_unmap,
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.bus_fixup = pcibr_bus_fixup,
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.force_interrupt = pcibr_force_interrupt,
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.target_interrupt = pcibr_target_interrupt
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};
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int
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pcibr_init_provider(void)
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{
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sn_pci_provider[PCIIO_ASIC_TYPE_PIC] = &pcibr_provider;
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sn_pci_provider[PCIIO_ASIC_TYPE_TIOCP] = &pcibr_provider;
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return 0;
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}
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EXPORT_SYMBOL_GPL(sal_pcibr_slot_enable);
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EXPORT_SYMBOL_GPL(sal_pcibr_slot_disable);
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