45 lines
683 B
ArmAsm
45 lines
683 B
ArmAsm
/* atomic.S: Move this stuff here for better ICACHE hit rates.
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*
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* Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu)
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*/
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#include <asm/ptrace.h>
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#include <asm/psr.h>
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.text
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.align 4
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.globl __atomic_begin
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__atomic_begin:
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#ifndef CONFIG_SMP
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.globl ___xchg32_sun4c
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___xchg32_sun4c:
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rd %psr, %g3
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andcc %g3, PSR_PIL, %g0
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bne 1f
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nop
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wr %g3, PSR_PIL, %psr
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nop; nop; nop
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1:
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andcc %g3, PSR_PIL, %g0
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ld [%g1], %g7
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bne 1f
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st %g2, [%g1]
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wr %g3, 0x0, %psr
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nop; nop; nop
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1:
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mov %g7, %g2
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jmpl %o7 + 8, %g0
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mov %g4, %o7
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.globl ___xchg32_sun4md
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___xchg32_sun4md:
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swap [%g1], %g2
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jmpl %o7 + 8, %g0
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mov %g4, %o7
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#endif
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.globl __atomic_end
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__atomic_end:
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