189 lines
5.1 KiB
C
189 lines
5.1 KiB
C
/***************************************************************************/
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/*
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* timers.c -- generic ColdFire hardware timer support.
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*
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* Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
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#include <linux/clocksource.h>
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#include <asm/io.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcftimer.h>
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#include <asm/mcfsim.h>
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/***************************************************************************/
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/*
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* By default use timer1 as the system clock timer.
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*/
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#define FREQ (MCF_BUSCLK / 16)
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#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
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/*
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* Default the timer and vector to use for ColdFire. Some ColdFire
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* CPU's and some boards may want different. Their sub-architecture
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* startup code (in config.c) can change these if they want.
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*/
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unsigned int mcf_timervector = 29;
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unsigned int mcf_profilevector = 31;
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unsigned int mcf_timerlevel = 5;
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/*
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* These provide the underlying interrupt vector support.
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* Unfortunately it is a little different on each ColdFire.
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*/
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extern void mcf_settimericr(int timer, int level);
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void coldfire_profile_init(void);
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#if defined(CONFIG_M532x)
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#define __raw_readtrr __raw_readl
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#define __raw_writetrr __raw_writel
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#else
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#define __raw_readtrr __raw_readw
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#define __raw_writetrr __raw_writew
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#endif
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static u32 mcftmr_cycles_per_jiffy;
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static u32 mcftmr_cnt;
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/***************************************************************************/
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static irqreturn_t mcftmr_tick(int irq, void *dummy)
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{
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/* Reset the ColdFire timer */
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__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
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mcftmr_cnt += mcftmr_cycles_per_jiffy;
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return arch_timer_interrupt(irq, dummy);
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}
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/***************************************************************************/
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static struct irqaction mcftmr_timer_irq = {
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.name = "timer",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = mcftmr_tick,
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};
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/***************************************************************************/
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static cycle_t mcftmr_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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u32 cycles;
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u16 tcn;
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local_irq_save(flags);
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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cycles = mcftmr_cnt;
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local_irq_restore(flags);
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return cycles + tcn;
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}
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/***************************************************************************/
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static struct clocksource mcftmr_clk = {
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.name = "tmr",
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.rating = 250,
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.read = mcftmr_read_clk,
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.shift = 20,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/***************************************************************************/
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void hw_timer_init(void)
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{
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setup_irq(mcf_timervector, &mcftmr_timer_irq);
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__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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mcftmr_cycles_per_jiffy = FREQ / HZ;
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/*
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* The coldfire timer runs from 0 to TRR included, then 0
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* again and so on. It counts thus actually TRR + 1 steps
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* for 1 tick, not TRR. So if you want n cycles,
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* initialize TRR with n - 1.
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*/
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__raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
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clocksource_register(&mcftmr_clk);
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mcf_settimericr(1, mcf_timerlevel);
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#ifdef CONFIG_HIGHPROFILE
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coldfire_profile_init();
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#endif
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}
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/***************************************************************************/
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#ifdef CONFIG_HIGHPROFILE
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/***************************************************************************/
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/*
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* By default use timer2 as the profiler clock timer.
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*/
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#define PA(a) (MCF_MBAR + MCFTIMER_BASE2 + (a))
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/*
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* Choose a reasonably fast profile timer. Make it an odd value to
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* try and get good coverage of kernel operations.
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*/
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#define PROFILEHZ 1013
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/*
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* Use the other timer to provide high accuracy profiling info.
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*/
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irqreturn_t coldfire_profile_tick(int irq, void *dummy)
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{
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/* Reset ColdFire timer2 */
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__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
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if (current->pid)
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profile_tick(CPU_PROFILING);
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return IRQ_HANDLED;
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}
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/***************************************************************************/
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static struct irqaction coldfire_profile_irq = {
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.name = "profile timer",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = coldfire_profile_tick,
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};
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void coldfire_profile_init(void)
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{
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printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
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PROFILEHZ);
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setup_irq(mcf_profilevector, &coldfire_profile_irq);
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/* Set up TIMER 2 as high speed profile clock */
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__raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
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__raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
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mcf_settimericr(2, 7);
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}
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/***************************************************************************/
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#endif /* CONFIG_HIGHPROFILE */
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/***************************************************************************/
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