76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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* Copyright 2009 Holger Schurig, hs4233@mail.mn-solutions.de
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*
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* This contains i.MX21-specific hardware definitions. For those
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* hardware pieces that are common between i.MX21 and i.MX27, have a
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* look at mx2x.h.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_MXC_MX21_H__
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#define __ASM_ARCH_MXC_MX21_H__
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#error "Do not include directly."
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#endif
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/* Memory regions and CS */
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#define SDRAM_BASE_ADDR 0xC0000000
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#define CSD1_BASE_ADDR 0xC4000000
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#define CS0_BASE_ADDR 0xC8000000
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#define CS1_BASE_ADDR 0xCC000000
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#define CS2_BASE_ADDR 0xD0000000
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#define CS3_BASE_ADDR 0xD1000000
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#define CS4_BASE_ADDR 0xD2000000
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#define CS5_BASE_ADDR 0xDD000000
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#define PCMCIA_MEM_BASE_ADDR 0xD4000000
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/* NAND, SDRAM, WEIM etc controllers */
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#define X_MEMC_BASE_ADDR 0xDF000000
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#define X_MEMC_BASE_ADDR_VIRT 0xF4200000
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#define X_MEMC_SIZE SZ_256K
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#define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000)
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#define EIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000)
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#define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000)
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#define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000)
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#define IRAM_BASE_ADDR 0xFFFFE800 /* internal ram */
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/* fixed interrupt numbers */
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#define MXC_INT_USBCTRL 58
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#define MXC_INT_USBCTRL 58
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#define MXC_INT_USBMNP 57
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#define MXC_INT_USBFUNC 56
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#define MXC_INT_USBHOST 55
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#define MXC_INT_USBDMA 54
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#define MXC_INT_USBWKUP 53
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#define MXC_INT_EMMADEC 50
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#define MXC_INT_EMMAENC 49
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#define MXC_INT_BMI 30
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#define MXC_INT_FIRI 9
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/* fixed DMA request numbers */
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#define DMA_REQ_BMI_RX 29
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#define DMA_REQ_BMI_TX 28
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#define DMA_REQ_FIRI_RX 4
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#endif /* __ASM_ARCH_MXC_MX21_H__ */
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