Now that sh64 has grown extended page flag support we finally have a free
bit for _PAGE_SPECIAL. Wire it up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that all of the controllers have been fixed up, we can finally select
GENERIC_HARDIRQS_NO_DEPRECATED.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently the irq chip is found through the irq_desc, but as this is
going away convert over to an irq_data lookup instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
irq_32.c was updated for the new API, while irq_64.c was overlooked. This
syncs them up and gets things building again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The introduction of MAX_PHYSMEM_BITS in to the initial cpuinfo struct
causes a build error when sparsemem is disabled and asm/sparsemem.h is
not brought in by other means. Include it explicitly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that the genirq code provides an IRQ bitmap of its own and the
necessary API to manipulate it, there's no need to keep our own version
around anymore.
In the process we kill off some unused IRQ reservation code, with future
users now having to tie in to the genirq API as normal.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
CPUs can be in either the legacy 29-bit or 32-bit physical addressing
modes. This follows the x86 approach of tracking the phys bits in cpuinfo
and exposing it to userspace through procfs.
This change was requested to permit kexec-tools to detect the physical
addressing mode in order to determine the appropriate address mangling.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* 'next' of git://git.monstr.eu/linux-2.6-microblaze: (42 commits)
microblaze: Fix build with make 3.82
fbdev/xilinxfb: Microblaze driver support
microblaze: Support C optimized lib functions for little-endian
microblaze: Separate library optimized functions
microblaze: Support timer on AXI lite
microblaze: Add support for little-endian Microblaze
microblaze: KGDB little endian support
microblaze: Add PVR for endians plus detection
net: emaclite: Add support for little-endian platforms
microblaze: trivial: Add comment for AXI pvr
microblaze: pci-common cleanup
microblaze: Support early console on uart16550
microblaze: Do not compile early console support for uartlite if is disabled
microblaze: Setup early console dynamically
microblaze: Rename all uartlite early printk functions
microblaze: remove early printk uarlite console dependency from header
microblaze: Remove additional compatible properties
microblaze: Remove hardcoded asm instraction for PVR loading
microblaze: Use static const char * const where possible
microblaze: Define VMALLOC_START/END
...
* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging: (24 commits)
hwmon: lis3: Release resources in case of failure
hwmon: lis3: Short explanations of platform data fields
hwmon: lis3: Enhance lis3 selftest with IRQ line test
hwmon: lis3: use block read to access data registers
hwmon: lis3: Adjust fuzziness for 8 bit device
hwmon: lis3: New parameters to platform data
hwmon: lis3: restore axis enabled bits
hwmon: lis3: Power on corrections
hwmon: lis3: Update coordinates at polled device open
hwmon: lis3: Cleanup interrupt handling
hwmon: lis3: regulator control
hwmon: lis3: pm_runtime support
Kirkwood: add fan support for Network Space Max v2
hwmon: add generic GPIO fan driver
hwmon: (coretemp) fix reading of microcode revision (v2)
hwmon: ({core, pkg, via-cpu}temp) remove unnecessary CONFIG_HOTPLUG_CPU ifdefs
hwmon: (pkgtemp) align driver initialization style with coretemp
hwmon: LTC4261 Hardware monitoring driver
hwmon: (lis3) add axes module parameter for custom axis-mapping
hwmon: (hp_accel) Add HP Mini 510x family support
...
In the MN10300 arch, we occasionally see an assertion being tripped in
alloc_cwqs() at the following line:
/* just in case, make sure it's actually aligned */
---> BUG_ON(!IS_ALIGNED(wq->cpu_wq.v, align));
return wq->cpu_wq.v ? 0 : -ENOMEM;
The values are:
wa->cpu_wq.v => 0x902776e0
align => 0x100
and align is calculated by the following:
const size_t align = max_t(size_t, 1 << WORK_STRUCT_FLAG_BITS,
__alignof__(unsigned long long));
This is because the pointer in question (wq->cpu_wq.v) loses some of its
lower bits to control flags, and so the object it points to must be
sufficiently aligned to avoid the need to use those bits for pointing to
things.
Currently, 4 control bits and 4 colour bits are used in normal
circumstances, plus a debugging bit if debugging is set. This requires
the cpu_workqueue_struct struct to be at least 256 bytes aligned (or 512
bytes aligned with debugging).
PERCPU() alignment on MN13000, however, is only 32 bytes as set in
vmlinux.lds.S. So we set this to PAGE_SIZE (4096) to match most other
arches and stick a comment in alloc_cwqs() for anyone else who triggers
the assertion.
Reported-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Mark Salter <msalter@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
If lis3lv02d_init_device fails, HW resources were not released
properly. In case of failure call release_resources if available.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
No one uses these MMRs so we didn't notice when the anomaly handling
logic was inverted.
Reported-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This code was useful during early port development when our icache code
wasn't solid, but that ship has sailed long ago, and no code calls this
function anymore (irq_panic). So punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Configure chip to data ready mode in selftest and count received
interrupts to see that interrupt line(s) are working.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Add optional blockread function to interface driver. If available
the chip driver uses it for data register access. For 12 bit device
it reads 6 bytes to get 3*16bit data. For 8 bit device it reads out
5 bytes since every second byte is dummy.
This optimizes bus usage and reduces number of operations and
interrupts needed for one data update.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Default fuziness is set smaller for 8 device.
In 12 bit device LSB is quite close to 1 mg
(mg = 1 / 1000 of earth gravity).
In 8bit device LSB is about 18 mg.
Set fuziness to 1 for 8 bit device.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Added default output data rate setting to platform data.
If default rate is 0, reset default value is used.
Added control for duration via platform data.
Added possibility to configure interrupts to trig on
both rising and falling edge. The lis3 WU unit can be
configured quite many ways and with some configurations it
is quite handy to get coordinate refresh when some
event trigs and when it reason goes away.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
All axis enable bits are set to 0 at module remove.
Restore reset default value at init.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Sometimes lis3 chip seems to fail to setup factory tuning at boot up.
This probably happens if there is some odd power ramp down ramp up sequence
for example in device restart. Set boot bit in control2 register to
trig boot sequence manually and wait until it is finished.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Call input device poll function at device open to refresh coordinates
immediately. This is needed for the case where poll interval is set to
zero and coordinate updates happens purely under interrupt control.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Irqcfg moved to chip data instead of platform data.
This simplifies access in interrupt handler little bit.
Input device open and close functions set status for
interrupt threaded handler once.
Unnecessary check for interrupt source removed since
it is enough that active interrupt line indicates that
there was an interrupt.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Based on pm_runtime control, turn lis3 regulators on and off.
Perform context save and restore on transitions.
Feature is optional and must be enabled in platform data.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Add pm_runtime support to lis3 core driver.
Add pm_runtime support to lis3 i2c driver.
spi and hp_accel drivers are not yet supported. Old always
on functionality remains for those.
For sysfs there is 5 second delay before turning off the
chip to avoid long ramp up delay.
Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Acked-by: Eric Piel <eric.piel@tremplin-utc.net>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
This patch adds hwmon support for fans connected to GPIO lines.
Platform specific information such as GPIO pinout and speed conversion array
(rpm from/to GPIO value) are passed to the driver via platform_data.
Signed-off-by: Simon Guinot <sguinot@lacie.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
According to the documentation, simply reading the respective MSR
isn't sufficient: It should be written with zeros, cpuid(1) be
executed, and then read (see arch/x86/kernel/cpu/intel.c for an
example).
v2: Fail probe when microcode revision cannot be determined, but is
needed to check for proper operation.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Chen Gong <gong.chen@linux.intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Paul Mundt
Thomas Gleixner
Linus Torvalds
Erik Gilling
David Howells
Samu Onkalo
Mike Frysinger
Simon Guinot
Jan Beulich