623b4ac4bf
Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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| .. | ||
| ioat | ||
| ipu | ||
| ppc4xx | ||
| Kconfig | ||
| Makefile | ||
| at_hdmac.c | ||
| at_hdmac_regs.h | ||
| coh901318.c | ||
| coh901318_lli.c | ||
| coh901318_lli.h | ||
| dmaengine.c | ||
| dmatest.c | ||
| dw_dmac.c | ||
| dw_dmac_regs.h | ||
| fsldma.c | ||
| fsldma.h | ||
| iop-adma.c | ||
| iovlock.c | ||
| mv_xor.c | ||
| mv_xor.h | ||
| shdma.c | ||
| shdma.h | ||
| txx9dmac.c | ||
| txx9dmac.h | ||